HD6417615AF60 HITACHI [Hitachi Semiconductor], HD6417615AF60 Datasheet - Page 572
HD6417615AF60
Manufacturer Part Number
HD6417615AF60
Description
CMOS single-chip microcontroller
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HD6417615AF60.pdf
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Bits 1 and 0—Clock Enable 1 and 0 (CKE1, CKE0): These bits are used to select the SCIF clock
source and enable or disable clock output from the SCK pin. The combination of the CKE1 and
CKE0 bits determines whether the SCK pin functions as the serial clock output pin or the serial
clock input pin. The function of the SCK pin should be selected with the pin function controller
(PFC).
The setting of the CKE0 bit, however, is only valid for internal clock operation (CKE1 = 0) in
asynchronous mode. The CKE0 bit setting is invalid in synchronous mode and in the case of
external clock operation (CKE1 = 1). The CKE1 and CKE0 bits must be set before determining
the SCIF’s operating mode with SCSMR.
For details of clock source selection, see table 14.9 in section 14.3, Operation.
Bit 1:
CKE1
0
1
Notes: 1. Initial value
2. Outputs a clock with a frequency of 16/8/4 times the bit rate.
3. Inputs a clock with a frequency of 16/8/4 times the bit rate.
4. Don’t care
Bit 0:
CKE0
0
1
*
4
Description
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Internal clock/SCK pin functions as input pin (input
signal ignored)*
Internal clock/SCK pin functions as serial clock
output*
Internal clock/SCK pin functions as clock output*
Internal clock/SCK pin functions as serial clock
output
External clock/SCK pin functions as clock input*
External clock/SCK pin functions as serial clock
input
1
1
3
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