HD6417615AF60 HITACHI [Hitachi Semiconductor], HD6417615AF60 Datasheet - Page 461

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HD6417615AF60

Manufacturer Part Number
HD6417615AF60
Description
CMOS single-chip microcontroller
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
Bits 29 and 28—Rx Frame Position 1, 0 (RFP1, RFP0): These two bits specify the relationship
between the receive buffer and receive frame.
Bit 29:
RFP
0
1
Bit 27—Rx Frame Error (RFE): Indicates that one or other bit of the receive frame status indicated
by bits 26 to 0 is set. Whether or not the receive frame status information is copied into this bit is
specified by the Tx/Rx status copy enable register.
Bit 27: RFE
0
1
Bits 26 to 0—Rx Frame Status 26 to 0 (RFS26 to RFS0): These bits indicate the error status
during frame reception.
446
RFS26 to RFS10—Reserved
RFS9—Rx FIFO Overflow (corresponds to EESR.RMAF)
RFS8—Reserved
RFS7—Receive Multicast Address Frame (corresponds to EESR.RMAF)
RFS6, RSF5—Reserved
RFS4—Receive Residual-Bit Frame (corresponds to EESR.RRF)
RFS3—Receive Too-Long Frame (corresponds to EESR.RTLF)
RFS2—Receive Too-Short Frame (corresponds to EESR.RTSF)
RFS1—PHY-LSI Receive Error (corresponds to EESR.PRE)
RFS0—CRC Error on Received Frame (corresponds to EESR.CERF)
Bit 28:
RFP
0
1
0
1
Description
No error during reception
An error of some kind occurred during reception (see bits 26 to 0)
Description
Frame reception for receive buffer indicated by this descriptor continues
(frame is not concluded)
Receive buffer indicated by this descriptor contains end of frame (frame is
concluded)
Receive buffer indicated by this descriptor is start of frame (frame is not
concluded)
Contents of receive buffer indicated by this descriptor are equivalent to one
frame (one frame/one buffer)
(Initial value)

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