MC9S08DZ16 FREESCALE [Freescale Semiconductor, Inc], MC9S08DZ16 Datasheet - Page 95

• Manufacturer Part Number: MC9S08DZ16
• Description: 8-Bit HCS08 Central Processor Unit (CPU)
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

6.5.2.3
6.5.2.4
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
Freescale Semiconductor
PTBPE[7:0]
PTBSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
rate control to the desired value to ensure correct operation.
W
W
R
R
PTBPE7
PTBSE7
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
Port B Pull Enable Register (PTBPE)
0
Port B Slew Rate Enable Register (PTBSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTBPE6
PTBSE6
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
0
0
6
6
Table 6-11. PTBPE Register Field Descriptions
Table 6-12. PTBSE Register Field Descriptions
PTBPE5
PTBSE5
MC9S08DZ60 Series Data Sheet, Rev. 4
0
0
5
5
PTBPE4
PTBSE4
NOTE
0
0
4
4
Description
Description
PTBPE3
PTBSE3
3
0
3
0
PTBPE2
PTBSE2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTBPE1
PTBSE1
0
0
1
1
PTBPE0
PTBSE0
0
0
0
0
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