M30622SAFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622SAFP Datasheet - Page 114

no-image

M30622SAFP

Manufacturer Part Number
M30622SAFP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30622SAFP
Manufacturer:
AVAGO
Quantity:
18
Part Number:
M30622SAFP
Manufacturer:
MITSUBISHI
Quantity:
852
Part Number:
M30622SAFP
Manufacturer:
MITSUBISHI
Quantity:
20 000
Part Number:
M30622SAFP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Serial I/O
114
Figure 1.16.8. Serial I/O-related registers (5)
UART2 special mode register
b7 b6 b5 b4 b3 b2 b1 b0
UART transmit/receive control register 2
b7
b6
0
b5
b4
b3
b2
b1
b0
Note 1: Nothing but “0” may be written.
Note 2: When not in I 2 C mode, do not set this bit by writing a “1”. During normal mode, fix it to “0”. When this
Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,
Note: When using multiple pins to output the transfer clock, the following requirements must be met:
ABSCS
CLKMD0
CLKMD1
ACSE
U0RRM
U1RRM
SDDS
symbol
SSS
Nothing is assigned.
In an attempt to write to this bit, write “0”. The value, if read, turns out to be indeterminate.
symbol
LSYN
U0IRS
U1IRS
Reserved bit
IICM
ABC
BBS
Bit
Bit
bit = “0”, UART2 special mode register 3 (U2SMR3 at address 0375
digital delay setup bits) are initialized to “000”, with the analog delay circuit selected. Also, when SDDS
only the digital delay value is effective.
Symbol
U2SMR
= “0”, the U2SMR3 register cannot be read or written to.
Symbol
• UART1 internal/external clock select bit (bit 3 at address 03A8
UCON
I 2 C mode select bit
Arbitration lost detecting
flag control bit
Transmit start condition
select bit
SDA digital delay select
bit (Note 2, Note 3)
Bus busy flag
SCLL sync output
enable bit
Bus collision detect
sampling
clock select bit
Auto clear function
select bit of transmit
enable bit
UART0 transmit
interrupt cause select bit
UART1 transmit
interrupt cause select bit
UART0 continuous
receive mode enable bit
UART1 continuous
receive mode enable bit
CLK/CLKS select bit 0
CLK/CLKS select
bit 1 (Note)
name
name
Bit
Bit
Address
Address
0377
03B0
16
16
0 : Analog delay output
1 : Digital delay output
(must always be “0” when
(During clock synchronous
0 : Normal mode
1 : IIC mode
0 : Update per bit
1 : Update per byte
0 : STOP condition detected
1 : START condition detected
0 : Disabled
1 : Enabled
Must always be “0”
Must always be “0”
Must always be “0”
0 :
1 : Transmission completed
0 :
1 : Transmission completed
0 : Continuous receive
1 : Continuous receive
Valid when bit 5 = “1”
0 : Clock output to CLK1
1 : Clock output to CLKS1
0 : Normal mode
1 : Transfer clock output
Always set to “0”
not using I C mode)
(During clock synchronous
0 : Continuous receive
1 : Continuous receive
is selected
is selected
Transmit buffer empty (Tl = 1)
Transmit buffer empty (Tl = 1)
(CLK output is CLK1 only)
from multiple pins
function selected
(TXEPT = 1)
(TXEPT = 1)
mode disabled
mode enable
mode disabled
mode enabled
serial I/O mode)
serial I/O mode)
When reset
When reset
X0000000
Function
Function
00
2
16
2
0 : Rising edge of transfer
1 : Under flow signal of timer A0
0 : Ordinary
1 : Falling edge of RxD2
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
0 : No auto clear function
1 : Auto clear at occurrence of
Must always be “0”
Invalid
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
Invalid
Invalid
Must always be “0”
clock
bus collision
(TXEPT = 1)
(TXEPT = 1)
(During UART mode)
(During UART mode)
16
) = “0”.
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Function
) bits 7 to 5 (DL2 to DL0 = SDA
Function
(Note1)
R
R
W
W
M16C / 62A Group
Mitsubishi microcomputers

Related parts for M30622SAFP