M30622SAFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622SAFP Datasheet - Page 115
M30622SAFP
Manufacturer Part Number
M30622SAFP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30622SAFP.pdf
(274 pages)
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Serial I/O
Figure 1.16.9. Serial I/O-related registers (6)
UART2 special mode register 2 (I C bus exclusive use register)
UART2 special mode register 3 (I C bus exclusive use register)
b7 b6 b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Note 1: This bit can be read or written to when UART2 special mode register (U2SMR at address 0377
Note 2: These bits are initialized to “000” when SDDS = “0”, with the analog delay circuit selected. After a reset,
Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,
Note 4: The amount of delay varies with the load on SCL and SDA pins. Also, when using an external clock, the
7 (SDDS: SDA digital delay select bit) = “1”. When the initial value of UART2 special mode register 3
(U2SMR3) is read after setting SDDS = “1”, the value is “00
register 3 (U2SMR3) after setting SDDS = “1”, be sure to write 0's to bits 0–4. When SDDS = “0”,
this register cannot be written to; when read, the value is indeterminate.
these bits are set to “000”, with the analog delay circuit selected. However, because these bits can be
read only when SDDS = “1”, the value read from these bits when SDDS = “0” is indeterminate.
only the digital delay value is effective.
amount of delay increases by about 100 ns, so be sure to take this into account when using the device.
ALS
SDHI
DL0
DL1
DL2
IICM2
CSC
SWC
STAC
SWC2
SHTC
symbol
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be
indeterminate. However, when SDDS = “1”, the value “0” is read out (Note 1)
symbol
Bit
Bit
Symbol
Symbol
U2SMR2
U2SMR3
I C mode select bit 2
Clock-synchronous bit
UART2 initialization bit
SDA output disable bit
Start/stop condition
control bit
SCL wait output bit
SDA output stop bit
SCL wait output bit 2
SDA digital delay setup
bit
(Note 1, Note 2, Note 3,
2
Note 4)
2
2
Bit name
Bit name
Address
Address
0376
0375
16
16
b7 b6 b5
Refer to Table 1.16.11
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0 : Disabled
1 : Enabled
0: UART2 clock
1: 0 output
0: Enabled
1: Disabled (high impedance)
Set this bit to “1” in I
(refer to Table 1.16.12)
0 0 0 : Analog delay is selected
0 0 1 : 2 cycle of 1/f(X
0 1 0 : 3 cycle of 1/f(X
0 1 1 : 4 cycle of 1/f(X
1 0 0 : 5 cycle of 1/f(X
1 0 1 : 6 cycle of 1/f(X
1 1 0 : 7 cycle of 1/f(X
1 1 1 : 8 cycle of 1/f(X
(However, when SDDS = “1”, the initial value is “00
Indeterminate
When reset
When reset
(I C bus exclusive use register)
00
16
2
16
”. When writing to UART2 special mode
(I 2 C bus exclusive use)
2
Function
C mode
Function
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
IN
IN
IN
IN
IN
IN
IN
)
)
)
)
)
)
)
Digital delay is
selected
M16C / 62A Group
Mitsubishi microcomputers
16
) bit
R
R
16
W
W
”)
115
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