HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 224

• Manufacturer Part Number: HD6433044
• Description: (HD64 Series) Hitachi Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Table 8-7 Register Functions in Idle Mode
Register
Decremented
Legend
MAR:
IOAR: I/O address register
ETCR: Execute transfer count register
MAR and IOAR specify the source and destination addresses. MAR specifies a 24-bit source or
destination address. IOAR specifies the lower 8 bits of a fixed address. The upper 16 bits are all
1s. MAR and IOAR are not incremented or decremented.
Figure 8-4 illustrates how idle mode operates.
23
23
MAR
All 1s
Memory address register
15
MAR
ETCR
7
IOAR
0
0
0
Figure 8-4 Operation in Idle Mode
Activated by
SCI 0 Receive-
Data-Full
Interrupt
Destination
address
register
Source
address
register
Transfer counter
1 byte or word is
transferred per request
Function
Transfer
210
Other
Activation
Source
address
register
Destination
address
register
Initial Setting
Destination or
source address
Source or
destination
address
transfers
Operation
Held fixed
Held fixed
Number of
once per
transfer until
H'0000 is
reached and
transfer ends
IOAR