HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 258

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HD6433044

Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet

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Table 9-1 Port Functions (cont)
Port
Port 9 • 6-bit I/O port
Port A • 8-bit I/O port
Port B
• 8-bit I/O port
• Can drive LEDs
• PB
Description
• Schmitt inputs
have Schmitt
inputs
3
to PB
0
Pins
P9
P9
P9
P9
P9
P9
PA
TIOCB
PA
TIOCA
PA
TIOCB
PA
TIOCA
PA
TIOCB
PA
TIOCA
PA
TEND
PA
TEND
PB
DREQ
PB
DREQ
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
/SCK
/SCK
/RxD
/RxD
/TxD
/TxD
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
/TP
1
0
1
0
2
2
1
1
0
0
/TCLKB,
/TCLKA
7
6
5
4
3
2
1
0
15
/ADTRG, converter, and generic input/output
14
,/CS
/A
/A
/A
/A
/TCLKD, (DMAC), ITU input and output (TCLKD, TCLKC, TCLKB, TCLKA,
/TCLKC,
/
/
/
/
/
/
/
/
1
0
1
0
1
0
/
/
,
,
,
/IRQ
/IRQ
20
21
22
23
/CS
/CS
/CS
7
5
4
, Input and output (SCK
, communication interfaces 1 and 0 (SCI1/0), IRQ
4
5
6
Mode 1 Mode 2 Mode 3 Mode 4 Mode 5
6-bit generic input/output
Output (TP
from pro-
grammable
timing pattern
controller (TPC),
input or output
(TIOCB
16-bit integrated
timer unit
(ITU), and
generic input/
output
TPC output
(TP
ITU input and
output (TIOCA
TIOCB
TIOCA
CS
generic input/
output
TPC output (TP
TIOCB
TPC output (TP
TPC output (TP
and generic input/output
6
6
output, and
to TP
1
1
0
2
,
), CS
, TIOCA
) for
4
7
),
)
245
4
2
to
,
3
15
14
0
), and generic input/output
to TP
), DMAC input (DREQ
), DMAC input (DREQ
Address output
(A
TPC output
(TP
ITU input and
output (TIOCA
TIOCB
TIOCA
address output
(A
CS
output,
and generic
input/output
1
20
23
0
4
, SCK
), output (TEND
6
)
to A
to CS
to TP
1
1
,
),
21
0
, RxD
6
4
),
),
2
,
1
, RxD
1
1
0
TPC output Address
(TP
input or
output
(TIOCB
and generic
input/output
TPC output TPC output TPC
(TP
ITU input
and output
(TIOCA
TIOCB
TIOCA
CS
output, and output
generic
input/output CS
, TEND
), trigger input (ADTRG) to A/D
), CS
0
, TxD
4
6
7
), ITU
to CS
to TP
7
1
1
output,
0
2
2
5
,
),
1
),
,
) from DMA controller
, TxD
and IRQ
4
6
), (TP
Mode 6
output
(A
ITU input
and output
(TIOCA
TIOCB
TIOCA
address
(A
output, and input/
generic
input/output
0
20
23
) for serial
4
6
)
4
to A
to CS
to TP
input, and
1
1
2
,
),
,
21
4
), and
6
), output
Mode 7
TPC
output
(TP
ITU input
or output
(TIOCB
and
generic
input/
output
(TP
TP
input and
output
(TIOCA
TIOCB
TIOCA
generic
output
TPC output
(TP
DMAC
input
(DREQ
and generic
input/
output
4
7
6
14
), ITU
),
to
),
1
1
2
0
2
),
,
),
),
,

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