HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 490

• Manufacturer Part Number: HD6433044
• Description: (HD64 Series) Hitachi Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Receiving Multiprocessor Serial Data: Figure 13-12 shows a sample flowchart for receiving
multiprocessor serial data and indicates the procedure to follow.
No
No
No
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data from RDR
Read receive data from RDR
Set MPIE bit to 1 in SCR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit to 0 in SCR
Figure 13-12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)
Finished receiving?
FER
FER
Start receiving
RDRF = 1?
RDRF = 1?
Own ID?
Initialize
End
ORER = 1
ORER = 1
Yes
No
Yes
No
Yes
No
Yes
Yes
Yes
3
1
2
No
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Error handling
4
479
5
1.
2.
3.
4.
5.
SCI initialization: the receive data function
of the RxD pin is selected automatically.
ID receive cycle: set the MPIE bit to 1 in SCR.
SCI status check and ID check: read SSR,
check that the RDRF flag is set to 1, then read
data from RDR and compare with the
processor’s own ID. If the ID does not match,
set the MPIE bit to 1 again and clear the
RDRF flag to 0. If the ID matches, clear the
RDRF flag to 0.
SCI status check and data receiving: read
SSR, check that the RDRF flag is set to 1,
then read data from RDR.
Receive error handling and break detection:
if a receive error occurs, read the
ORER and FER flags in SSR to identify the error.
After executing the necessary error handling,
clear the ORER and FER flags both to 0.
Receiving cannot resume while either the ORER
or FER flag remains set to 1. When a framing
error occurs, the RxD pin can be read to detect
the break state.