HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 308
HD6433044
Manufacturer Part Number
HD6433044
Description
(HD64 Series) Hitachi Single-Chip Microcomputer
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6433044.pdf
(867 pages)
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— PWM mode
Phase counting mode selectable in channel 2
Two-phase encoder output can be counted automatically.
Three additional modes selectable in channels 3 and 4
— Reset-synchronized PWM mode
— Complementary PWM mode
— Buffering
High-speed access via internal 16-bit bus
The 16-bit timer counters, general registers, and buffer registers can be accessed at high speed
via a 16-bit bus.
Fifteen interrupt sources
Each channel has two compare match/input capture interrupts and an overflow interrupt. All
interrupts can be requested independently.
Activation of DMA controller (DMAC)
Four of the compare match/input capture interrupts from channels 0 to 3 can start the DMAC.
Output triggering of programmable timing pattern controller (TPC)
Compare match/input capture signals from channels 0 to 3 can be used as TPC output
triggers.
PWM output can be provided with an arbitrary duty cycle. With synchronization, up to
five-phase PWM output is possible
If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of
complementary waveforms.
If channels 3 and 4 are combined, three-phase PWM output is possible with three pairs of
non-overlapping complementary waveforms.
Input capture registers can be double-buffered. Output compare registers can be updated
automatically.
296
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