HD6433044 Hitachi Semiconductor, HD6433044 Datasheet - Page 498

• Manufacturer Part Number: HD6433044
• Description: (HD64 Series) Hitachi Single-Chip Microcomputer
• Manufacturer: Hitachi Semiconductor

Receiving Serial Data: Figure 13-18 shows a sample flowchart for receiving serial data and
indicates the procedure to follow. When switching from asynchronous mode to synchronous
mode, make sure that the ORER, PER, and FER flags are cleared to 0. If the FER or PER flag is
set to 1 the RDRF flag will not be set and both transmitting and receiving will be disabled.
No
No
Read ORER flag in SSR
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
RDRF flag to 0 in SSR
from RDR, and clear
Read receive data
Start receiving
ORER = 1?
RDRF = 1?
receiving?
Finished
Initialize
End
Figure 13-18 Sample Flowchart for Serial Receiving (1)
Yes
Yes
No
continued on next page
Yes
Error handling
1
2
4
5
3
487
1.
2, 3.
4.
5.
SCI initialization: the receive data function of
the RxD pin is selected automatically.
occurs, read the ORER flag in SSR, then after
executing the necessary error handling, clear
the ORER flag to 0. Neither transmitting nor
receiving can resume while the ORER flag
remains set to 1.
SCI status check and receive data read: read
SSR, check that the RDRF flag is set to 1,
then read receive data from RDR and clear
the RDRF flag to 0. Notification that the RDRF
flag has changed from 0 to 1 can also be
given by the RXI interrupt.
To continue receiving serial data: check the
RDRF flag, read RDR, and clear the RDRF
flag to 0 before the MSB (bit 7) of the current
frame is received. If the DMAC is activated
by a receive-data-full interrupt request (RXI)
to read RDR, the RDRF flag is cleared
automatically.
Receive error handling: if a receive error