K9F5608D0D SAMSUNG [Samsung semiconductor], K9F5608D0D Datasheet - Page 32

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K9F5608D0D

Manufacturer Part Number
K9F5608D0D
Description
32M x 8 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 5 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Refer to Figure 14 below.
Figure 14. RESET Operation
Table5. Device Status
READ ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Two read cycles sequentially output the manufacture code(ECh), and the device code respectively. The command register
remains in Read ID mode until further commands are issued to it. Figure 13 shows the operation sequence.
Figure 13. Read ID Operation
K9F5608R0D
K9F5608U0D
R/B
I/Ox
CLE
CE
WE
ALE
RE
I/Ox
Operation Mode
FFh
K9F5608D0D
90h
Address. 1cycle
00h
After Power-up
Read 1
t
WHR1
t
AR
t
RST
t
CEA
32
t
REA
K9F5608R0D
K9F5608D0D
K9F5608U0D
Device
Maker code
ECh
Waiting for next command
After Reset
FLASH MEMORY
Device code
Device
Code*
Device Code*
35h
75h
75h

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