AX88796BLI ASIX [ASIX Electronics Corporation], AX88796BLI Datasheet - Page 52

• Manufacturer Part Number: AX88796BLI
• Description: Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller
• Manufacturer: ASIX [ASIX Electronics Corporation]

5.1.73 VLAN ID 0 Register (VIDR0)
Offset 1CH (Write)
5.1.74 Current TX End Page Register (CTEPR)
Offset 1CH (Read)
5.1.75 VLAN ID 1 Register (VIDR1)
Offset 1DH (Write)
5.1.76 Big-Endian Register (BER)
Offset 1EH (Write)
5.1.77 Host Wake Up Register (HWUR)
Offset 1FH (Write)
5.1.78 Software Reset
Offset 1FH (Read)
Field
7:0
Field
7
6:0
Field
7:5
4
3:0
Field
7:0
Field
7:1
0
Field
7:0
TXCQF
CTEPR
PRI
CFI
VIDR1
-
-
Name
VIDR0
Name
Name
Name
-
Name
HWAKE
(SC)
Name
Description
VLAN ID [7:0]
Description (Default = 00h)
TX Command Queue full
When set, indicate the TX Command queue was full. Host must check this status before
queuing next transmit page and byte count.
AX88796B will update CTEPR (current TX end page)
After every transmitting completed without collision.
It is for Host to conform how many free page can reuse for next transmitting.
The value is from 40h to 7Fh. It will be 00h when reset or STP.
Description
Frame’s priority
Canonical Address Frame Indicator
VLAN ID [11:8]
Description (Default = 00h)
All zero, (Default): little-endian
If not all zero means set data byte order as big-endian mode.
Note: This mode can be used by 32-bit big-endian mode of processors operating with an
external 16-bit bus only.
Description
Reserved
Host write one to wake up AX88796B from D2 power saving. It will be auto clear when
wake up.
Description
Don’t care this read value.
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AX88796BLF / AX88796BLI
ASIX ELECTRONICS CORPORATION