OM11043 NXP Semiconductors, OM11043 Datasheet - Page 56

DEVELOPMENT BOARD LPC1768 MBED

OM11043

Manufacturer Part Number
OM11043
Description
DEVELOPMENT BOARD LPC1768 MBED
Manufacturer
NXP Semiconductors
Series
mbedr
Type
MCUr
Datasheets

Specifications of OM11043

Contents
Board and software
Development Tool Type
Hardware / Software - Eval/Demo Board
Kit Contents
Board Cable Docs
Mcu Supported Families
LPC1000
Tool / Board Applications
General Purpose MCU, MPU, DSP, DSC
Silicon Manufacturer
NXP
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
LPC17xx
Silicon Family Name
LPC17xx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
LPC1768
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4916

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
OM11043
Manufacturer:
NXP
Quantity:
103
NXP Semiconductors
Table 14.
T
[1]
LPC1769_68_67_66_65_64_63
Product data sheet
Symbol
common to input and output
t
t
t
t
output
t
input
t
t
r
f
WH
WL
v(Q)
su(D)
h(D)
Fig 17. I
amb
CCLK = 20 MHz; peripheral clock to the I
signal in the I
=
SDA
SCL
40
2
°
C-bus pins clock timing
Dynamic characteristics: I
Parameter
rise time
fall time
pulse width HIGH
pulse width LOW
data output valid time
data input set-up time
data input hold time
C to +85
70 %
30 %
S
2
11.6 I
S-bus specification.
t
f
°
C.
t
f
70 %
Remark: The I2S-bus interface is available on parts LPC1769/68/67/66/65/63. See
Table
30 %
2
S-bus interface
1 / f
2.
SCL
t
HD;DAT
70 %
30 %
2
on pin I2STX_SDA
on pin I2SRX_SDA
on pin I2SRX_SDA
Conditions
on pins I2STX_CLK and
I2SRX_CLK
on pins I2STX_CLK and
I2SRX_CLK
on pin I2STX_WS
2
S-bus interface pins
S-bus interface PCLK =
70 %
30 %
All information provided in this document is subject to legal disclaimers.
t
SU;DAT
Rev. 6.01 — 11 March 2011
70 %
30 %
LPC1769/68/67/66/65/64/63
CCLK
t
LOW
4
; I
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
2
S clock cycle time T
t
Min
-
-
0.495 × T
-
-
-
3.5
4.0
HIGH
32-bit ARM Cortex-M3 microcontroller
70 %
30 %
cy(clk)
t
VD;DAT
cy(clk)
Typ
-
-
-
-
-
-
-
-
= 1600 ns, corresponds to the SCK
Max
35
35
-
0.505 × T
30
30
-
-
© NXP B.V. 2011. All rights reserved.
002aaf425
cy(clk)
Unit
ns
ns
-
ns
ns
ns
ns
ns
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