OM11043 NXP Semiconductors, OM11043 Datasheet - Page 75

• Manufacturer Part Number: OM11043
• Description: DEVELOPMENT BOARD LPC1768 MBED
• Manufacturer: NXP Semiconductors
• Series: mbedr
• Type: MCUr

Specifications of OM11043

• Contents: Board and software
• Development Tool Type: Hardware / Software - Eval/Demo Board
• Kit Contents: Board Cable Docs
• Mcu Supported Families: LPC1000
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Silicon Manufacturer: NXP
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: LPC17xx
• Silicon Family Name: LPC17xx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: LPC1768
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4916

NXP Semiconductors
17. Revision history
Table 25.
LPC1769_68_67_66_65_64_63
Product data sheet
Document ID
LPC1769_68_67_66_65_64_63
v.6.01
Modifications:
LPC1769_68_67_66_65_64_63 v.6 20100825
Modifications:
LPC1769_68_67_66_65_64_63 v.5 20100716
LPC1769_68_67_66_65_64 v.4
LPC1768_67_66_65_64 v.3
LPC1768_66_65_64 v.2
LPC1768_66_65_64 v.1
Revision history
Release
date
<tbd>
20100201
20091119
20090211
20090115
•
•
•
•
•
•
•
•
•
Pin description of pins P0[29] and P0[30] updated in
are not 5 V tolerant.
Typical value for Parameter N
Parameter V
Table
Condition 3.0 V ≤ V
Typical values for parameters I
power-down mode corrected in
Table note 11
For Deep power-down mode,
Part LPC1768TFBGA added.
Section
Added
All information provided in this document is subject to legal disclaimers.
7.
Section
Rev. 6.01 — 11 March 2011
7.30.2; BOD level corrected.
Data sheet status
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Product data sheet
Objective data sheet -
Objective data sheet -
hys
updated.
10.2.
for I
LPC1769/68/67/66/65/64/63
DD(3V3)
2
C bus pins: typical value corrected V
≤ 3.6 V added in
endu
Figure 9
DD(REG)(3V3)
Table 7
Change notice Supersedes
-
-
-
-
-
added in
32-bit ARM Cortex-M3 microcontroller
updated and
and
and I
Table
Table
Table note
BAT
LPC1769_68_67_66_65_64 v.6
LPC1769_68_67_66_65_64 v.5
LPC1769_68_67_66_65_64 v.4
LPC1768_67_66_65_64 v.3
LPC1768_66_65_64 v.2
LPC1768_66_65_64 v.1
-
9.
16.
with condition Deep
Figure 10
Table note 5
9,
hys
Table note
= 0.05V
© NXP B.V. 2011. All rights reserved.
added.
of
Table
DD(3V3)
10, and
4. Pins
75 of 79
in