AT32UC3A0128-ALUT Atmel, AT32UC3A0128-ALUT Datasheet - Page 76

• Manufacturer Part Number: AT32UC3A0128-ALUT
• Description: IC MCU AVR32 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.6.7
Name:
Access Type:
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32058J–AVR32–04/11
BODDET: Brown out detection
OSC32RDY: 32 KHz oscillator Ready
OSC1RDY: Oscillator 1 Ready
OSC0RDY: Oscillator 0 Ready
MSKRDY: Mask Ready
CKRDY: Clock Ready
LOCK1: PLL1 locked
LOCK0: PLL0 locked
OSC0RDY
31
23
15
7
-
-
-
Set to 1 when 0 to 1 transition on POSCSR:BODDET bit is detected:
BOD reference value.
Set to 1 when 0 to 1 transition on the POSCSR:OSC32RDY bit is detected:
used as clock source.
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
clock source.
Set to 1 when 0 to 1 transition on the POSCSR:OSC1RDY bit is detected:
clock source.
Set to 1 when 0 to 1 transition on the POSCSR:MSKRDY bit is detected:
(CPU/HSB/PBA/PBB)_MASK registers.
0: The CKSEL register has been written, and the new clock setting is not yet effective.
1: The synchronous clocks have frequencies as indicated in the CKSEL register.
Note: Writing ICR:CKRDY to 1 has no effect.
Set to 1 when 0 to 1 transition on the POSCSR:LOCK1 bit is detected:
source.
Set to 1 when 0 to 1 transition on the POSCSR:LOCK0 bit is detected:
source.
Interrupt Enable/Disable/Mask/Status/Clear
MSKRDY
30
22
14
6
IER/IDR/IMR/ISR/ICR
IER/IDR/ICR: Write-only
IMR/ISR: Read-only
-
-
-
CKRDY
29
21
13
5
-
-
-
28
20
12
4
-
-
-
-
27
19
11
3
-
-
-
-
BOD has detected that power supply is going below
PLL 1 is locked and ready to be selected as clock
PLL 0 is locked and ready to be selected as clock
Clocks are now masked according to the
Oscillator 1 is stable and ready to be used as
Oscillator 1 is stable and ready to be used as
The 32 KHz oscillator is stable and ready to be
26
18
10
2
-
-
-
-
OSC32RDY
LOCK1
25
17
9
1
-
-
AT32UC3A
OSC1RDY
BODDET
LOCK0
24
16
8
0
-
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