AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 125

• Manufacturer Part Number: AT89C5132-ROTUL
• Description: IC 8051 MCU FLASH 64K USB 80TQFP
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5132-ROTUL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
• Peripherals: I²S, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Cpu Family: 89C
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: IDE/SPI/UART/USB
• Total Internal Ram Size: 2.25KB
• # I/os (max): 44
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 2-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• Package: 80TQFP
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 2304 B
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 2
• Height: 1.45 mm
• Length: 14.1 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 2.7 V
• Width: 14.1 mm
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.1
19.3.2
19.3.3
19.3.4
4173E–USB–09/07
Master Configuration
Slave Configuration
Data Exchange
Master Mode with Polling Policy
The SPI operates in master mode when the MSTR bit in SPCON is set.
The SPI operates in slave mode when the MSTR bit in SPCON is cleared and data has been
loaded in SPDAT.
There are two possible Policies to exchange data in master and slave modes:
•
•
Figure 19-9 shows the initialization phase and the transfer phase flows using the polling policy.
Using this flow prevents any overrun error occurrence.
•
•
•
•
This policy provides the fastest effective transmission and is well adapted when communicating
at high speed with other Microcontrollers. However, the procedure may then be interrupted at
any time by higher priority tasks.
polling
interrupts
The bit rate is selected according to Table 97.
The transfer format depends on the slave peripheral.
SS may be deasserted between transfers depending also on the slave peripheral.
SPIF flag is cleared when reading SPDAT (SPSTA has been read before by the “end of
transfer” check).
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