AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 129

IC 8051 MCU FLASH 64K USB 80TQFP

AT89C5132-ROTUL

Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5132-ROTUL

Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5132-ROTUL
Manufacturer:
Atmel
Quantity:
10 000
19.4
4173E–USB–09/07
Registers
Figure 19-12. Slave SPI Interrupt Policy Flows
Table 98. SPCON Register
SPCON (S:C3h) – SPI Control Register
Bit Number
SPR2
7
7
6
5
4
3
2
Mnemonic
SSDIS
MSTR
SPEN
SPEN
CPOL
CPHA
SPR2
Bit
6
Program CPOL & CPHA
Write Data in SPDAT
SPI Initialization
Select Slave Mode
Interrupt Policy
Prepare Transfer
Enable Interrupt
Select Format
Enable SPI
MSTR = 0
SPEN = 1
Description
SPI Rate Bit 2
Refer to Table 97 for bit rate description.
SPI Enable Bit
Set to enable the SPI interface.
Clear to disable the SPI interface.
Slave Select Input Disable Bit
Set to disable SS in both master and slave modes. In slave mode this bit has no effect if
CPHA = 0.
Clear to enable SS in both master and slave modes.
Master Mode Select
Set to select the master mode.
Clear to select the slave mode.
SPI Clock Polarity Bit
Set to have the clock output set to high level in idle state.
Clear to have the clock output set to low level in idle state.
SPI Clock Phase Bit
Set to have the data sampled when the clock returns to idle state (see CPOL).
Clear to have the data sampled when the clock leaves the idle state (see CPOL).
ESPI =1
SSDIS
5
MSTR
4
(1)
CPOL
3
Prepare New Transfer
Write Data in SPDAT
Get Data Received
Service Routine
SPI Interrupt
Read SPSTA
Read SPDAT
Get Status
CPHA
2
AT89C5132
SPR1
1
SPR0
0
129

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