AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 97

• Manufacturer Part Number: AT89C5132-ROTUL
• Description: IC 8051 MCU FLASH 64K USB 80TQFP
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5132-ROTUL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
• Peripherals: I²S, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Cpu Family: 89C
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: IDE/SPI/UART/USB
• Total Internal Ram Size: 2.25KB
• # I/os (max): 44
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 2-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: TQFP
• Package: 80TQFP
• Family Name: 89C
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 44
• Number Of Timers: 2
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 2304 B
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 2
• Height: 1.45 mm
• Length: 14.1 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 2.7 V
• Width: 14.1 mm
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 16-20. MMC Controller Interrupt System
16.8
4173E–USB–09/07
Registers
MMINT.7
MMINT.6
MMINT.5
MMINT.4
MMINT.3
MMINT.2
MMINT.1
MMINT.0
MCBI
EORI
EOCI
EOFI
F2FI
F1FI
F2EI
F1EI
The interrupt request is generated each time an unmasked flag is set, and the global MMC con-
troller interrupt enable bit is set (EMMC in IEN1 register).
Reading the MMINT register automatically clears the interrupt flags (acknowledgment). This
implies that register content must be saved and tested interrupt flag by interrupt flag to be sure
not to overlook any interrupts.
Table 78. MMCON0 Register
MMCON0 (S:E4h) – MMC Control Register 0
Number
DRPTR
MMMSK.6
MMMSK.4
MMMSK.2
MMMSK.0
EORM
Bit
EOFM
F1EM
F1FM
7
7
Mnemonic Description
MMMSK.7
MMMSK.5
MMMSK.3
MMMSK.1
DTPTR
DRPTR
MCBM
EOCM
F2FM
F2EM
Bit
6
Data Receive Pointer Reset Bit
Set to reset the read pointer of the data FIFO.
Clear to release the read pointer of the data FIFO.
CRPTR
5
CTPTR
4
EMMC
IEN1.0
MBLOCK
3
MMC Interface
Interrupt Request
DFMT
2
AT89C5132
RFMT
1
CRCDIS
0
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