AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 83

IC 8051 MCU FLASH 64K USB 80TQFP

AT89C5132-ROTUL

Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5132-ROTUL

Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5132-ROTUL
Manufacturer:
Atmel
Quantity:
10 000
16.2.1
16.2.2
4173E–USB–09/07
Bus Lines
Bus Protocol
The bus communication uses a special protocol (MultiMedia Card bus protocol) which is applica-
ble for all devices. Therefore, the payload data transfer between the host and the cards can be
bidirectional.
The MultiMedia Card bus architecture requires all cards to be connected to the same set of
lines. No card has an individual connection to the host or other devices, which reduces the con-
nection costs of the MultiMedia Card system.
The bus lines can be divided into three groups:
After a Power-on reset, the host must initialize the cards by a special message-based MultiMe-
dia Card bus protocol. Each message is represented by one of the following tokens:
Card addressing is implemented using a session address assigned during the initialization
phase, by the bus controller to all currently connected cards. Individual cards are identified by
their CID number. This method requires that every card will have an unique CID number. To
ensure uniqueness of CIDs the CID register contains 24 Bits (MID and OID fields) which are
defined by the MMCA. Every card manufacturers is required to apply for an unique MID (and
optionally OID) number.
MultiMedia Card bus data transfers are composed of these tokens. One data transfer is a bus
operation. There are different types of operations. Addressed operations always contain a com-
mand and a response token. In addition, some operations have data token, the others transfer
their information directly within the command or response structure. In this case no data token is
present in an operation. The Bits on the MDAT and the MCMD lines are transferred synchronous
to the host clock.
Two types of data transfer commands are defined:
Figure 16-1 to Figure 16-5 show the different types of operations, on these figures, grayed
tokens are from host to card(s) while white tokens are from card(s) to host.
Power supply: V
Data transfer: MCMD, MDAT – used for bidirectional communication.
Clock: MCLK – used to synchronize data transfer across the bus.
Command: a command is a token which starts an operation. A command is transferred
serially from the host to the card on the MCMD line.
Response: a response is a token which is sent from an addressed card (or all connected
cards) to the host as an answer to a previously received command. It is transferred serially
on the MCMD line.
Data: data can be transferred from the card to the host or vice-versa. Data is transferred
serially on the MDAT line.
Sequential commands: These commands initiate a continuous data stream, they are
terminated only when a stop command follows on the MCMD line. This mode reduces the
command overhead to an absolute minimum.
Block-oriented commands: These commands send data block succeeded by CRC Bits. Both
read and write operations allow either single or multiple block transmission. A multiple block
transmission is terminated when a stop command follows on the MCMD line similarly to the
stream read.
SS1
and V
SS2
, V
DD
– used to supply the cards.
AT89C5132
83

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