R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 115

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
10.6
Table 10.5
10.6.1
Oscillation stop detection clock and
frequency bandwidth
Enabled condition for oscillation stop
detection function
Operation at oscillation stop detection
The oscillation stop detection function detects the stop of the XIN clock oscillating circuit. The oscillation stop
detection function can be enabled and disabled by the OCD0 bit in the OCD register.
Table 10.5 lists the Specifications of Oscillation Stop Detection Function.
When the XIN clock is the CPU clock source and bits OCD1 to OCD0 are set to 11b, the system is placed in the
following state if the XIN clock stops.
• OCD2 bit in OCD register = 1 (on-chip oscillator clock selected)
• OCD3 bit in OCD register = 1 (XIN clock stops)
• CM14 bit in CM1 register = 0 (low-speed on-chip oscillator oscillates)
• Oscillation stop detection interrupt request is generated.
• The oscillation stop detection interrupt shares a vector with the voltage monitor 1 interrupt, the voltage
• When the XIN clock restarts after oscillation stop, switch the XIN clock to the clock source of the CPU clock
• To enter wait mode while using the oscillation stop detection function, set the CM02 bit to 0 (peripheral
• Since the oscillation stop detection function is a function for cases where the XIN clock is stopped by an
• This function cannot be used when the XIN clock frequency is 2 MHz or below. In this case, set bits OCD1 to
• To use the low-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
monitor 2 interrupt, and the watchdog timer interrupt. When using the oscillation stop detection interrupt and
watchdog timer interrupt, the interrupt source needs to be determined.
Table 10.6 lists the Determining Interrupt Source for Oscillation Stop Detection, Watchdog Timer, Voltage
Monitor 1, and Voltage Monitor 2 Interrupts. Figure 10.17 shows an Example of Determining Interrupt
Source for Oscillation Stop Detection, Watchdog Timer, Voltage Monitor 1, or Voltage Monitor 2 Interrupt.
and peripheral functions by a program.
Figure 10.16 shows the Procedure for Switching Clock Source from Low-Speed On-Chip Oscillator to XIN
Clock.
function clock does not stop in wait mode).
external cause, set bits OCD1 to OCD0 to 00b when the XIN clock stops or is started by a program, (stop
mode is selected or the CM05 bit is changed).
OCD0 to 00b.
after detecting the oscillation stop, set the FRA01 bit in the FRA0 register to 0 (low-speed on-chip oscillator
selected) and bits OCD1 to OCD0 to 11b.
To use the high-speed on-chip oscillator clock for the CPU clock and clock sources of peripheral functions
after detecting the oscillation stop, set the FRA00 bit to 1 (high-speed on-chip oscillator on) and the FRA01
bit to 1 (high-speed on-chip oscillator selected) and then set bits OCD1 to OCD0 to 11b.
Oscillation Stop Detection Function
Feb 29, 2008
How to Use Oscillation Stop Detection Function
Specifications of Oscillation Stop Detection Function
Item
Page 96 of 485
f(XIN) ≥ 2 MHz
Set bits OCD1 to OCD0 to 11b
Oscillation stop detection interrupt is generated
Specification
10. Clock Generation Circuit