R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 360

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 16.27
IIC bus Interrupt Enable Register
b7 b6 b5 b4
NOTES:
1.
2.
An overrun error interrupt request is generated w hen the clock synchronous format is used.
Set the STIE bit to 1 (enable stop condition detection interrupt request) w hen the STOP bit in the ICSR register is set
to 0.
Feb 29, 2008
b3 b2 b1
ICIER Register
b0
Bit Symbol
ACKBR
Symbol
ACKBT
NAKIE
ACKE
ICIER
STIE
TEIE
RIE
TIE
Page 341 of 485
Transmit acknow ledge
select bit
Receive acknow ledge bit
Acknow ledge bit judgment
select bit
Stop condition detection
interrupt enable bit
NACK receive interrupt
enable bit
Receive interrupt enable
bit
Transmit end interrupt
enable bit
Transmit interrupt enable
bit
Address
Bit Name
00BBh
0 : 0 is transmitted as acknow ledge bit in
1 : 1 is transmitted as acknow ledge bit in
0 : Acknow ledge bit received from
1 : Acknow ledge bit received from
0 : Value of receive acknow ledge bit is ignored
1 : When receive acknow ledge bit is set to 1,
0 : Disables stop condition detection interrupt
1 : Enables stop condition detection interrupt
0 : Disables NACK receive interrupt request and
1 : Enables NACK receive interrupt request and
0 : Disables receive data full and overrun
1 : Enables receive data full and overrun
0 : Disables transmit end interrupt request
1 : Enables transmit end interrupt request
0 : Disables transmit data empty interrupt request
1 : Enables transmit data empty interrupt request
receive device in transmit mode is set to 0.
receive device in transmit mode is set to 1.
and continuous transfer is performed.
continuous transfer is halted.
request
request
arbitration lost/overrun error interrupt request
arbitration lost/overrun error interrupt request
error interrupt request
error interrupt request
receive mode.
receive mode.
(2)
16. Clock Synchronous Serial Interface
After Reset
Function
00h
(1)
(1)
RW
RW
RW
RW
RW
RW
RW
RW
RO