R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 257

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.86
Timer RD Start Register
b7 b6 b5 b4 b3 b2
NOTES:
1.
2.
3.
4.
5.
Set the TRDSTR register using the MOV instruction (do not use the bit handling instruction). Refer to 14.3.12.1
TRDSTR Register of Notes on Tim er RD.
When the CSEL0 bit is set to 1, w rite 0 to the TSTART0 bit.
When the CSEL1 bit is set to 1, w rite 0 to the TSTART1 bit.
When the CSEL0 bit is set to 0 and the compare match signal (TRDIOA0) is generated, this bit is set to 0 (count
stops).
When the CSEL1 bit is set to 0 and the compare match signal (TRDIOA1) is generated, this bit is set to 0 (count
stops).
Feb 29, 2008
TRDSTR Register in Complementary PWM Mode
b1 b0
Bit Symbol
TSTART0
TSTART1
TRDSTR
(b7-b4)
Symbol
CSEL0
CSEL1
(1)
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TRD0 count start flag
TRD1 count start flag
TRD0 count operation select bit 0 : Count stops at compare match w ith
TRD1 count operation select bit 0 : Count stops at compare match w ith
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Address
Bit Name
0137h
(4)
(5)
0 : Count stops
1 : Count starts
0 : Count stops
1 : Count starts
1 : Count continues at compare match w ith
1 : Count continues at compare match w ith
the TRDGRA0 register
the TRDGRA0 register
the TRDGRA1 register
the TRDGRA1 register
(2)
(3)
After Reset
11111100b
Function
14. Timers
RW
RW
RW
RW
RW
—