R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 130

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 12.7
Table 12.5
Watchdog timer, oscillation stop detection, voltage monitor 1,
voltage monitor 2, Address break
Software, address match, single-step
12.1.6.5
12.1.6.6
Figure 12.7 shows the Interrupt Response Time. The interrupt response time is the period between an interrupt
request generation and the execution of the first instruction in the interrupt routine. The interrupt response time
includes the period between interrupt request generation and the completion of execution of the instruction
(refer to (a) in Figure 12.7) and the period required to perform the interrupt sequence (20 cycles, refer to (b) in
Figure 12.7).
When an interrupt request of a maskable interrupt is acknowledged, the interrupt priority level of the
acknowledged interrupt is set in the IPL.
When a software interrupt or special interrupt request is acknowledged, the level listed in Table 12.5 is set in
the IPL.
Table 12.5 lists the IPL Value When Software or Special Interrupt Is Acknowledged.
Feb 29, 2008
Interrupt request is generated. Interrupt request is acknowledged.
Interrupt Response Time
IPL Change when Interrupt Request is Acknowledged
IPL Value When Software or Special Interrupt Is Acknowledged
Interrupt Response Time
(a) Period between interrupt request generation and the completion of execution of an
(b) 21 cycles for address match and single-step interrupts.
instruction. The length of time varies depending on the instruction being executed. The
DIVX instruction requires the longest time, 30 cycles (assuming no wait states and that a
register is set as the divisor).
Interrupt Source
Page 111 of 485
Instruction
(a)
Interrupt response time
Interrupt sequence
20 cycles (b)
7
Not changed
interrupt routine
Instruction in
Value Set in IPL
Time
12. Interrupts