R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 482

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
21.3.3
Table 21.1
When the CSELi bit is set to 1, set the TSTARTi bit to 0 and the count
stops.
When the CSELi bit is set to 0, the count stops at compare match of
registers TRDi and TRDGRAi.
21.3.3.1
21.3.3.2
21.3.3.3
When writing the value to the TRDSRi register and continuously reading the same register, the value before
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
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Feb 29, 2008
Set the TRDSTR register using the MOV instruction.
When the CSELi (i = 0 to 1) is set to 0 (the count stops at compare match of registers TRDi and
TRDGRAi), the count does not stop and the TSTARTi bit remains unchanged even if 0 (count stops) is
written to the TSTARTi bit.
Therefore, set the TSTARTi bit to 0 to change other bits without changing the TSTARTi bit when the
CSELi bit is se to 0.
To stop counting by a program, set the TSTARTi bit after setting the CSELi bit to 1. Although the CSELi
bit is set to 1 and the TSTARTi bit is set to 0 at the same time (with 1 instruction), the count cannot be
stopped.
Table 21.1 lists the TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops to use the TRDIOji (j
= A, B, C, or D) pin with the timer RD output.
When writing the value to the TRDi register by a program while the TSTARTi bit in the TRDSTR register
is set to 1 (count starts), avoid overlapping with the timing for setting the TRDi register to 0000h, and then
write. If the timing for setting the TRDi register to 0000h overlaps with the timing for writing the value to
the TRDi register, the value is not written and the TRDi register is set to 0000h.
- 001b (Clear by the TRDi register at compare match with the TRDGRAi register.)
- 010b (Clear by the TRDi register at compare match with the TRDGRBi register.)
- 011b (Synchronous clear)
- 101b (Clear by the TRDi register at compare match with the TRDGRCi register.)
- 110b (Clear by the TRDi register at compare match with the TRDGRDi register.)
When writing the value to the TRDi register and continuously reading the same register, the value before
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
These precautions are applicable when selecting the following by bits CCLR2 to CCLR0 in the
TRDCRi register.
Notes on Timer RD
Program example
Program example
TRDSTR Register
TRDi Register (i = 0 or 1)
TRDSRi Register (i = 0 or 1)
TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops
Page 463 of 485
Count Stop
L1:
L1:
MOV.W
JMP.B
MOV.W
MOV.B
JMP.B
MOV.B
#XXXXh, TRD0
L1
TRD0,DATA
#XXh, TRDSR0
L1
TRDSR0,DATA
Hold the output level immediately before the
count stops.
Hold the output level after output changes by
compare match.
TRDIOji Pin Output when Count Stops
;Writing
;JMP.B
;Reading
;Writing
;JMP.B
;Reading
21. Usage Notes