R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 240

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.69
Timer RD Interrupt Enable Register i (i = 0 or 1)
b7 b6 b5 b4 b3 b2
Feb 29, 2008
Registers TRDIER0 to TRDIER1 in PWM Mode
b1 b0
Bit Symbol
TRDIER0
TRDIER1
(b7-b5)
Symbol
IMIEA
IMIEB
IMIEC
IMIED
OVIE
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Input capture/compare match
interrupt enable bit A
Input capture/compare match
interrupt enable bit B
Input capture/compare match
interrupt enable bit C
Input capture/compare match
interrupt enable bit D
Overflow /underflow interrupt enable
bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Address
Bit Name
0144h
0154h
0 : Disable interrupt (IMIA) by the
1 : Enable interrupt (IMIA) by the
0 : Disable interrupt (IMIB) by the
1 : Enable interrupt (IMIB) by the
0 : Disable interrupt (IMIC) by the
1 : Enable interrupt (IMIC) by the
0 : Disable interrupt (IMID) by the
1 : Enable interrupt (IMID) by the
0 : Disable interrupt (OVI) by the
1 : Enable interrupt (OVI) by the
IMFA bit
IMFA bit
IMFB bit
IMFC bit
IMFC bit
IMFD bit
IMFD bit
OVF bit
OVF bit
IMFB bit
After Reset
11100000b
11100000b
Function
14. Timers
RW
RW
RW
RW
RW
RW
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