R5F21258SNFP#U0 Renesas Electronics America, R5F21258SNFP#U0 Datasheet - Page 208

• Manufacturer Part Number: R5F21258SNFP#U0
• Description: IC R8C/25 MCU FLASH 52LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21258SNFP#U0

• Core Size: 16/32-Bit
• Program Memory Size: 64KB (64K x 8)
• Core Processor: R8C
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• No. Of I/o's: 41
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 2.2V To 5.5V
• Embedded Interface Type: I2C, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: YMCRPR8C25 - REF PLATFORM MOTOR CTRL R8C/25R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 14.38
Timer RD I/O Control Register Ai (i = 0 or 1)
b7 b6 b5 b4
NOTES:
1.
2.
3.
4.
1
To select 1 (the TRDGRCi register is used as a buffer register of the TRDGRAi register) for this bit by the BFCi bit in
the TRDMR register, set the IOC2 bit in the TRDIORCi register to the same value as the IOA2 bit in the TRDIORAi
register.
To select 1 (the TRDGRDi register is used as a buffer register of the TRDGRBi register) for this bit by the BFDi bit in
the TRDMR register, set the IOD2 bit in the TRDIORCi register to the same value as the IOB2 bit in the TRDIORAi
register.
The IOA3 bit is enabled in the TRDIORA0 register only. Set to the IOA3 bit in TRDIORA1 to 1.
The IOA3 bit is enabled w hen the IOA2 bit is set to 1 (input capture function).
Feb 29, 2008
b3 b2
1
Registers TRDIORA0 to TRDIORA1 in Input Capture Function
b1 b0
TRDIORA0
TRDIORA1
Bit Symbol
Symbol
IOA0
IOA1
IOA2
IOA3
IOB0
IOB1
IOB2
(b7)
Page 189 of 485
—
TRDGRA control bits
TRDGRA mode select bit
Input capture input sw itch
bit
TRDGRB control bits
TRDGRB mode select bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
(3, 4)
Address
Bit Name
0141h
0151h
(2)
(1)
b1 b0
0 0 : Input capture to the TRDGRAi register
0 1 : Input capture to the TRDGRAi register
1 0 : Input capture to the TRDGRAi register
1 1 : Do not set.
b5 b4
0 0 : Input capture to the TRDGRBi register
0 1 : Input capture to the TRDGRBi register
1 0 : Input capture to the TRDGRBi register
1 1 : Do not set.
Set to 1 (input capture) in the input capture
function.
0 : fOCO128 Signal
1 : TRDIOA0 pin input
Set to 1 (input capture) in the input capture
function.
at the rising edge
at the falling edge
at both edges
at the rising edge
at the falling edge
at both edges
After Reset
10001000b
10001000b
Function
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
—