MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 101

• Manufacturer Part Number: MC68HC908JL8CSPE
• Description: IC MCU 8K FLASH 8MHZ 32-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JL8CSPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

programmed in one routine call is 2 bytes, the maximum is 15 bytes. ADDRH:ADDRL must always be the
start of boundary address (the page start address: $XX00, $XX40, $XX80, or $00C0) and DATASIZE
must be the same size when accessing the same page.
In some applications, the user may want to repeatedly store and read a set of data from an area of
non-volatile memory. This is easily possible when using an EEPROM array. As the write and erase
operations can be executed on a byte basis. For FLASH memory, the minimum erase size is the page —
64 bytes per page for MC68HC908JL8. If the data array size is less than the page size, writing and erasing
to the same page cannot fully utilize the page. Unused locations in the page will be wasted. The
EE_WRITE routine is designed to emulate the properties similar to the EEPROM. Allowing a more
efficient use of the FLASH page for data storage.
When the user dedicates a page of FLASH for data storage, and the size of the data array defined, each
call of the EE_WRTIE routine will automatically transfer the data in the data array (in RAM) to the next
blank block of locations in the FLASH page. Once a page is filled up, the EE_WRITE routine automatically
erases the page, and starts to reuse the page again. In the 64-byte page, an 4-byte control block is used
by the routine to monitor the utilization of the page. In effect, only 60 bytes are used for data storage. (see
Figure
When using this routine to store a 3-byte data array, the FLASH page can be programmed 20 times before
the an erase is required. In effect, the write/erase endurance is increased by 20 times. When a 15-byte
data array is used, the write/erase endurance is increased by 5 times. Due to the FLASH page size
limitation, the data array is limited from 2 bytes to 15 bytes.
The coding example below uses the $EF00–$EE3F page for data storage. The data array size is 15 bytes,
and the bus speed is 4.9152 MHz. The coding assumes the data block is already loaded in RAM, with the
address pointer, FILE_PTR, pointing to the first byte of the data block.
Freescale Semiconductor
7-9). The page control operations are transparent to the user.
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
PAGE BOUNDARY
PAGE BOUNDARY
ONE PAGE = 64 BYTES
Figure 7-9. EE_WRITE FLASH Memory Usage
CONTROL: 8 BYTES
F L A S H
DATA ARRAY
DATA ARRAY
DATA ARRAY
$XX00, $XX40, $XX80, OR $XXC0
ROM-Resident Routines
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