MC68HC908JL8CSPE Freescale Semiconductor, MC68HC908JL8CSPE Datasheet - Page 42

• Manufacturer Part Number: MC68HC908JL8CSPE
• Description: IC MCU 8K FLASH 8MHZ 32-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908JL8CSPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 26
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 13x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SDIP (0.400", 10.16mm)
• Controller Family/series: HC08
• No. Of I/o's: 26
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 4
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Configuration and Mask Option Registers (CONFIG & MOR)
3.3 Configuration Register 1 (CONFIG1)
COPRS — COP Rate Select Bit
LVID — Low Voltage Inhibit Disable Bit
SSREC — Short Stop Recovery Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
42
COPRS selects the COP time-out period. Reset clears COPRS.
(See
LVID disables the LVI module. Reset clears LVID.
(See
SSREC enables the CPU to exit stop mode with a delay of
32 ICLK cycles instead of a 4096 ICLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. Reset clears COPD.
(See
1 = COP timeout period is (2
0 = COP timeout period is (2
1 = Low voltage inhibit disabled
0 = Low voltage inhibit enabled
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Chapter 14 Computer Operating Properly
Chapter 15 Low Voltage Inhibit
Chapter 14 Computer Operating Properly
Address:
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal, do not set the SSREC bit.
Reset:
Read:
Write:
MC68HC908JL8/JK8 • MC68HC08JL8/JK8 • MC68HC908KL8 Data Sheet, Rev. 3.1
COPRS
$001F
Bit 7
R
0
Figure 3-1. Configuration Register 1 (CONFIG1)
= Reserved
R
6
0
13
18
– 2
– 2
(LVI).)
4
4
) ICLK cycles
) ICLK cycles
R
5
0
NOTE
LVID
(COP).)
(COP).)
4
0
R
3
0
SSREC
2
0
STOP
1
0
Freescale Semiconductor
COPD
Bit 0
0