MC9S08AW60CPUE Freescale Semiconductor, MC9S08AW60CPUE Datasheet - Page 148

IC MCU 64K FLASH 64-LQFP

MC9S08AW60CPUE

Manufacturer Part Number
MC9S08AW60CPUE
Description
IC MCU 64K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AW60CPUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
For Use With
DEMO9S08AW60E - DEMO BOARD FOR MC9S08AW60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 8 Internal Clock Generator (S08ICGV4)
The following sections contain initialization examples for various configurations.
Important configuration information is repeated here for reference.
1
148
1
SCM — self-clocked mode (FLL bypassed
internal)
FBE — FLL bypassed external
FEI — FLL engaged internal
FEE — FLL engaged external
Ensure that
MFD Value
The IRG typically consumes 100 μA. The FLL and DCO typically consumes 0.5 to 2.5 mA, depending upon output frequency.
For minimum power consumption and minimum jitter, choose N and R to be as small as possible.
Bypassed
Engaged
FLL
FLL
000
001
010
011
100
f
ICGDCLK
Clock Scheme
Hexadecimal values designated by a preceding $, binary values designated
by a preceding %, and decimal values have no preceding character.
FEI
4 MHz < f
Medium power (will be less than FEE if oscillator
range = high)
Good clock accuracy (After IRG is trimmed)
Lowest system cost (no external components
required)
IRG is on. DCO is on.
SCM
This mode is mainly provided for quick and reliable
system startup.
3 MHz < f
3 MHz < f
Medium power
Poor accuracy.
IRG is off. DCO is on and open loop.
Multiplication Factor (N)
, which is equal to
Clock Reference Source = Internal
Bus
Bus
Bus
< 20 MHz.
< 5 MHz (default).
< 20 MHz (via filter bits).
Table 8-11. ICGOUT Frequency Calculation Options
10
12
4
6
8
Table 8-10. ICG Configuration Consideration
Table 8-12. MFD and RFD Decode Table
1
f
ICGOUT
MC9S08AW60 Data Sheet, Rev 2
(f
IRG
* R, does not exceed f
f
ext
f
ICGDCLK
/ 7)* 64 * N / R
f
ICGOUT
f
* P * N / R
ext
NOTE
/ R
/ R
1
FEE
4 MHz < f
Medium power (will be less than FEI if oscillator
range = low)
High clock accuracy
Medium/High system cost (crystal, resonator or
external clock source required)
IRG is off. DCO is on.
FBE
f
used.
Lowest power
Highest clock accuracy
Medium/High system cost (Crystal, resonator or
external clock source required)
IRG is off. DCO is off.
RFD
Bus
000
001
010
011
100
Range = 0 ; P = 64
Range = 1; P = 1
ICGDCLKmax
range ≤ 8 MHz when crystal or resonator is
Clock Reference Source = External
Bus
NA
NA
64
P
< 20 MHz
.
Division Factor (R)
Typical f
immediately after reset
Typical f
Freescale Semiconductor
÷16
÷1
÷2
÷4
÷8
ICGOUT
IRG
Note
= 243 kHz
= 8 MHz

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