MC9S08AW60CPUE Freescale Semiconductor, MC9S08AW60CPUE Datasheet - Page 15

• Manufacturer Part Number: MC9S08AW60CPUE
• Description: IC MCU 64K FLASH 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AW60CPUE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: S08AW
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 8
• Operating Supply Voltage: - 0.3 V to + 5.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AW60E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• For Use With: DEMO9S08AW60E - DEMO BOARD FOR MC9S08AW60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Section Number
12.2 Modes of Operation .......................................................................................................................205
12.3 Register Definition ........................................................................................................................205
12.4 Functional Description ..................................................................................................................210
13.1 Introduction ...................................................................................................................................215
13.2 External Signal Description ..........................................................................................................218
13.3 Register Definition ........................................................................................................................218
13.4 Functional Description ..................................................................................................................225
13.5 Resets ............................................................................................................................................228
13.6 Interrupts .......................................................................................................................................228
13.7 Initialization/Application Information ..........................................................................................230
Freescale Semiconductor
12.1.3
12.1.4
12.2.1
12.3.1
12.3.2
12.3.3
12.3.4
12.3.5
12.4.1
12.4.2
12.4.3
13.1.1
13.1.2
13.1.3
13.2.1
13.2.2
13.3.1
13.3.2
13.3.3
13.3.4
13.3.5
13.4.1
13.6.1
13.6.2
13.6.3
MISO — Master Data In, Slave Data Out ....................................................................204
SS — Slave Select ........................................................................................................204
SPI in Stop Modes ........................................................................................................205
SPI Control Register 1 (SPI1C1) ..................................................................................205
SPI Control Register 2 (SPI1C2) ..................................................................................206
SPI Baud Rate Register (SPI1BR) ...............................................................................207
SPI Status Register (SPI1S) ..........................................................................................208
SPI Data Register (SPI1D) ...........................................................................................209
SPI Clock Formats ........................................................................................................210
SPI Interrupts ................................................................................................................213
Mode Fault Detection ...................................................................................................213
Features .........................................................................................................................217
Modes of Operation ......................................................................................................217
Block Diagram ..............................................................................................................218
SCL — Serial Clock Line .............................................................................................218
SDA — Serial Data Line ..............................................................................................218
IIC Address Register (IIC1A) .......................................................................................219
IIC Frequency Divider Register (IIC1F) ......................................................................219
IIC Control Register (IIC1C) ........................................................................................222
IIC Status Register (IIC1S) ..........................................................................................223
IIC Data I/O Register (IIC1D) ......................................................................................224
IIC Protocol ..................................................................................................................225
Byte Transfer Interrupt .................................................................................................229
Address Detect Interrupt ...............................................................................................229
Arbitration Lost Interrupt .............................................................................................229
Inter-Integrated Circuit (S08IICV1)
MC9S08AW60 Data Sheet, Rev 2
Chapter 13
Title
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