MC9S08AW60CPUE Freescale Semiconductor, MC9S08AW60CPUE Datasheet - Page 172

IC MCU 64K FLASH 64-LQFP

MC9S08AW60CPUE

Manufacturer Part Number
MC9S08AW60CPUE
Description
IC MCU 64K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AW60CPUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
For Use With
DEMO9S08AW60E - DEMO BOARD FOR MC9S08AW60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 10 Timer/Pulse-Width Modulator (S08TPMV2)
When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
10.4.3
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from 0x0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overflow flag (TOF) becomes set. Writing
to TPMxMODH or TPMxMODL inhibits TOF and overflow interrupts until the other byte is written. Reset
sets the TPM counter modulo registers to 0x0000, which results in a free-running timer counter (modulo
disabled).
It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well
before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the first counter overflow will occur.
172
Reset
Reset
Reset
W
W
W
R
R
R
Bit 15
Timer x Counter Modulo Registers (TPMxMODH:TPMxMODL)
Bit 7
Bit 7
0
0
0
7
7
7
Figure 10-6. Timer x Counter Modulo Register High (TPMxMODH)
Figure 10-7. Timer x Counter Modulo Register Low (TPMxMODL)
Figure 10-5. Timer x Counter Register Low (TPMxCNTL)
14
6
0
0
6
0
6
6
6
Any write to TPMxCNTL clears the 16-bit counter.
13
5
0
0
5
0
5
5
5
MC9S08AW60 Data Sheet, Rev 2
12
4
0
0
4
0
4
4
4
11
3
3
0
3
0
3
3
0
10
2
0
0
2
0
2
2
2
Freescale Semiconductor
1
0
9
0
1
0
1
1
1
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0

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