MC9S08AW60CPUE Freescale Semiconductor, MC9S08AW60CPUE Datasheet - Page 84

IC MCU 64K FLASH 64-LQFP

MC9S08AW60CPUE

Manufacturer Part Number
MC9S08AW60CPUE
Description
IC MCU 64K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08AW60CPUE

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
For Use With
DEMO9S08AW60E - DEMO BOARD FOR MC9S08AW60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 6 Parallel Input/Output
pullup enable (PTDPE), slew rate control (PTDSE), and drive strength select (PTDDS) are located in the
high page registers. Refer to
general-purpose I/O control and
Port D general-purpose I/O are shared with the ADC, KBI, and TPM1 and TPM2 external clock inputs.
When any of these shared functions is enabled, the direction, input or output, is controlled by the shared
function and not by the data direction register of the parallel I/O port. When a pin is shared with both the
ADC and a digital peripheral function, the ADC has higher priority. For example, in the case that both the
ADC and the KBI are configured to use PTD7 then the pin is controlled by the ADC module.
Refer to
external clock inputs.
Refer to
port D pins as analog inputs.
Refer to
keyboard inputs.
6.3.5
Port E pins are general-purpose I/O pins. Parallel I/O function is controlled by the port E data (PTED) and
data direction (PTEDD) registers which are located in page zero register space. The pin control registers,
pullup enable (PTEPE), slew rate control (PTESE), and drive strength select (PTEDS) are located in the
high page registers. Refer to
general-purpose I/O control and
Port E general-purpose I/O is shared with SCI1, SPI, and TPM1 timer channels. When any of these shared
functions is enabled, the direction, input or output, is controlled by the shared function and not by the data
direction register of the parallel I/O port. Also, for pins which are configured as outputs by the shared
function, the output data is controlled by the shared function and not by the port data register.
Refer to
port E pins as SCI pins.
Refer to
pins as SPI pins.
Refer to
channel pins.
84
Port E
Chapter 10, “Timer/PWM
Chapter 14, “Analog-to-Digital Converter
Chapter 9, “Keyboard Interrupt
Chapter 11, “Serial Communications Interface
Chapter 12, “Serial Peripheral Interface
Chapter 10, “Timer/PWM
Port E
MCU Pin:
SPSCK1
PTE7/
Bit 7
Section 6.4, “Parallel I/O
Section 6.4, “Parallel I/O
Section 6.5, “Pin
Section 6.5, “Pin
MOSI1
PTE6/
(S08TPMV2)” for more information about using port D pins as TPM
(S08TPMV2)”
6
MC9S08AW60 Data Sheet, Rev 2
Figure 6-5. Port E Pin Names
(S08KBIV1)” for more information about using port D pins as
MISO1
PTE5/
5
(S08SPIV3)”
Control” for more information about pin control.
Control” for more information about pin control.
(S08ADC10V1)” for more information about using
for more information about using port E pins as TPM
Control” for more information about
Control” for more information about
PTE4/
SS1
(S08SCIV2)”
4
for more information about using port E
TPM1CH1
PTE3/
3
for more information about using
TPM1CH0
PTE2/
2
Freescale Semiconductor
PTE1/
RxD1
1
PTE0/
TxD1
Bit 0

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