D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 15

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section
10.3 Clock Operating
Modes
Table 10.4 Available
Combinations of Clock
Mode and FRQCR
Values
10.5.3 Notes on
Changing the
Frequency
10.8.2 Changing the
Frequency
11.1.1 Features
11.2.5 Individual
Memory Control
Register (MCR)
Page
256
259
265
292
293
Cautions 4 to 6 deleted
Description
Newly added
Description added
5.The counter stops at a value of H'00 or H'01. The stop value
depends on the clock ratio.
If the following three conditions are all met, FRQCR should not be
changed when a transfer using the DMAC is in progress.
Refresh function description deleted
Description added
Bit 7—Synchronous DRAM Bank Active (RASD): Specifies
whether synchronous DRAM is used in bank active mode or auto-
precharge mode. Set auto-precharge mode when areas 2 and 3
are both designated as synchronous DRAM space.
The bank active mode should not be used unless the bus width
for all areas is 32 bits.
Bit table amended
Bits 6 to 3—Address Multiplex (AMX3, AMX2, AMX1, AMX0)
Bit6:
AMX3
0
• The clock ratio is other than I :B = 1:1.
• Bits IFC2 to IFC0 are changed.
• Bits STC2 to STC0 are not changed.
Bit5:
AMX2
1
Bit 4:
AMX1
0
1
Bit 3:
AMX0 Description
0
1
1
The row address begins with
A9 (The A9 value is output at
A1 when the row address is
output. 1M
products)
The row address begins with
A10 (The A10 value is output at
A1 when the row address is
output. 2M
products ,2M
products)
The row address begins with
A9 (The A9 value is output at
A1 when the row address is
output. 512k
products)
Rev. 5.0, 09/03, page xiii of xlvi
16-bit
8-bit
32-bit
16-bit
4-bank
4-bank
4-bank
4-bank