D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 97

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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As a result of the above settings, the R4 register changes as follows.
Place the data so that the upper 16 bits of the modulo start and end addresses are the same. This is
because the modulo start address overwrites only the lower 15 bits of the address register,
excluding bit 0.
Note: When addition indexing is used for DSP data addressing, the address pointer may exceed
2.4.3
Table 2.14 shows the instruction formats, and the meaning of the source and destination operands,
for instructions executed by the CPU core. The meaning of the operands depends on the
instruction code. The following symbols are used in the table.
xxxx:
mmmm: Source register
nnnn:
iiii:
dddd:
Inc.
Inc.
Inc.
the ME value without actually reaching it. In this case, the address pointer will not return
to the modulo start address. Not only with modulo addressing, but when X and Y data
addressing is used, bit 0 is ignored. 0 must always be written to bit 0 of the address
pointer, index register, MS, and ME.
CPU Instruction Formats
Instruction code
Destination register
Immediate data
Displacement
R4: H'A5007008
R4: H'A500700A
R4: H'A500700C
R4: H'A5007008
(Reaches modulo end address, so becomes modulo start address)
Rev. 5.0, 09/03, page 49 of 806

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