AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 526

• Manufacturer Part Number: AT32UC3B0512-A2UT
• Description: IC MCU AVR32 512K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 44
• Ram Memory Size: 96KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

24.6
24.6.1
32059K–03/2011
Functional Description
PWM Clock Generator
The PWM macrocell is primarily composed of a clock generator module and
Figure 24-2. Functional View of the Clock Generator Block Diagram
Caution: Before using the PWM macrocell, the programmer must ensure that the PWM clock in
the Power Manager is enabled.
The PWM macrocell master clock, CLK_PWM, is divided in the clock generator module to pro-
vide different clocks available for all channels. Each channel can independently select one of the
– Clocked by the system clock, CLK_PWM, the clock generator module provides 13
– Each channel can independently choose one of the clock generator outputs.
– Each channel generates an output waveform with attributes that can be defined
clocks.
independently for each channel through the user interface registers.
CLK_PWM
modulo n
Counter
PREA
PREB
MR
MR
Divider A
Divider B
DIVA
DIVB
CLK_PWM/32
CLK_PWM/2
CLK_PWM/16
CLK_PWM/64
CLK_PWM/128
CLK_PWM/256
CLK_PWM/512
CLK_PWM/1024
CLK_PWM
CLK_PWM/4
CLK_PWM/8
clk B
clk A
AT32UC3B
7
channels.
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