AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 587

• Manufacturer Part Number: AT32UC3B0512-A2UT
• Description: IC MCU AVR32 512K FLASH 64TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0512-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Controller Family/series: AT32UC3B
• No. Of I/o's: 44
• Ram Memory Size: 96KB
• Cpu Speed: 60MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

27.3.4.1
27.3.4.2
32059K–03/2011
Debug Communication Channel
breakpoints
Figure 27-2. JTAG-based Debugger
The Debug Communication Channel (DCC) consists of a pair OCD registers with associated
handshake logic, accessible to both CPU and JTAG. The registers can be used to exchange
data between the CPU and the JTAG master, both runtime as well as in debug mode.
One of the most fundamental debug features is the ability to halt the CPU, to examine registers
and the state of the system. This is accomplished by breakpoints, of which many types are
available:
When a breakpoint triggers, the CPU enters debug mode, and the D bit in the Status Register is
set. This is a privileged mode with dedicated return address and return status registers. All privi-
leged instructions are permitted. Debug mode can be entered as either OCD mode, running
instructions from JTAG, or monitor mode, running instructions from program memory.
• Unconditional breakpoints are set by writing OCD registers by JTAG, halting the CPU
• Program breakpoints halt the CPU when a specific address in the program is executed.
• Data breakpoints halt the CPU when a specific memory address is read or written, allowing
• Software breakpoints halt the CPU when the breakpoint instruction is executed.
immediately.
variables to be watched.
JTAG-based
debug tool
10-pin IDC
AVR32
JTAG
PC
AT32UC3B
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