AT32UC3B0512-A2UT Atmel, AT32UC3B0512-A2UT Datasheet - Page 600

IC MCU AVR32 512K FLASH 64TQFP

AT32UC3B0512-A2UT

Manufacturer Part Number
AT32UC3B0512-A2UT
Description
IC MCU AVR32 512K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheets

Specifications of AT32UC3B0512-A2UT

Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Controller Family/series
AT32UC3B
No. Of I/o's
44
Ram Memory Size
96KB
Cpu Speed
60MHz
No. Of Timers
1
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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27.5
Table 27-7.
27.5.1
32059K–03/2011
Instruction
OPCODE
Others
0x0C
0x0F
0x1C
0x1F
0x01
0x02
0x03
0x04
0x06
0x10
0x11
0x12
0x13
0x14
0x15
0x17
JTAG Instruction Summary
Security Restrictions
JTAG Instruction Summary
SAMPLE_PRELOAD
EXTEST
CLAMP
AVR_RESET
CHIP_ERASE
NEXUS_ACCESS
MEMORY_WORD_ACCESS
MEMORY_SERVICE
MEMORY_SIZED_ACCESS
SYNC
HALT
N/A
Instruction
IDCODE
INTEST
MEMORY_BLOCK_ACCESS
CANCEL_ACCESS
BYPASS
The implemented JTAG instructions in the 32-bit AVR are shown in the table below.
When the security fuse in the Flash is programmed, the following JTAG instructions are
restricted:
For description of what memory locations remain accessible, please refer to the SAB address
map.
Full access to these instructions is re-enabled when the security fuse is erased by the
CHIP_ERASE JTAG instruction.
Note that the security bit will read as programmed and block these instructions also if the Flash
Controller is statically reset.
• NEXUS_ACCESS
• MEMORY_WORD_ACCESS
• MEMORY_BLOCK_ACCESS
• MEMORY_SIZED_ACCESS
Description
Select the 32-bit Device Identification register as data register.
Take a snapshot of external pin values without affecting system operation.
Select boundary-scan chain as data register for testing circuitry external to
the device.
Select boundary-scan chain for internal testing of the device.
Bypass device through Bypass register, while driving outputs from boundary-
scan register.
Apply or remove a static reset to the device
Erase the device
Select the SAB Address and Data registers as data register for the TAP. The
registers are accessed in Nexus mode.
Select the SAB Address and Data registers as data register for the TAP.
Select the SAB Data register as data register for the TAP. The address is
auto-incremented.
Cancel an ongoing Nexus or Memory access.
Select the SAB Address and Data registers as data register for the TAP. The
registers are accessed in Memory Service mode.
Select the SAB Address and Data registers as data register for the TAP.
Synchronization counter
Halt the CPU for safe programming.
Bypass this device through the bypass register.
Acts as BYPASS
AT32UC3B
600

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