ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 1076

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

41.11.6
41.11.6.1
Table 41-47. SMC Read Signals - NRD Controlled (READ_MODE = 1)
1076
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
1
2
3
4
5
6
7
SAM3S Preliminary
SMC Timings
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
NCS low before NRD High
NRD Pulse Width
Read Timings
A0 - A22 Valid before NRD High
VDDIO Supply
Figure 41-25. Min and Max Access Time of Output Signals
SMC Timings are given with the following conditions.
VDDIO = 1.62V @ 30 pF
VDDIO = 3V @ 50 pF
Timings are given assuming a capacitance load on data, control and address pads:
In the following tables t
HOLD or NO HOLD SETTINGS (nrd hold ≠ 0, nrd hold = 0)
NO HOLD SETTINGS (nrd hold = 0)
TK (CKI =0)
TK (CKI =1)
HOLD SETTINGS (nrd hold ≠ 0)
nrd pulse - ncs
t
(nrd setup +
CPMCK
(nrd setup +
t
TF/TD
CPMCK
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
1.8V
31.3
25
0
0
+ 13.5
- 6.7
is MCK period. Timing extraction
+ 14
(2)
Min
nrd pulse - ncs
t
(nrd setup +
(nrd setup +
CPMCK
t
t
nrd pulse)*
nrd pulse *
rd setup) *
CPMCK
CPMCK
3.3V
28.5
20.4
SSC
0
0
SSC
+ 14.5
- 3.6
(3)
+ 15
0max
0min
1.8V
(2)
Max
3.3V
6500C–ATARM–8-Feb-11
(3)
Units
ns
ns
ns
ns
ns
ns
ns