ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 793

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.7.19
Name:
Addresses:
Access:
• COVFS: Counter Overflow
0 = no effect.
1 = disables the Counter Overflow Interrupt.
• LOVRS: Load Overrun
0 = no effect.
1 = disables the Load Overrun Interrupt (if WAVE = 0).
• CPAS: RA Compare
0 = no effect.
1 = disables the RA Compare Interrupt (if WAVE = 1).
• CPBS: RB Compare
0 = no effect.
1 = disables the RB Compare Interrupt (if WAVE = 1).
• CPCS: RC Compare
0 = no effect.
1 = disables the RC Compare Interrupt.
• LDRAS: RA Loading
0 = no effect.
1 = disables the RA Load Interrupt (if WAVE = 0).
• LDRBS: RB Loading
0 = no effect.
1 = disables the RB Load Interrupt (if WAVE = 0).
• ETRGS: External Trigger
0 = no effect.
1 = disables the External Trigger Interrupt.
6500C–ATARM–8-Feb-11
ETRGS
31
23
15
–
–
–
7
TC Interrupt Disable Register
LDRBS
30
22
14
TC_IDRx [x=0..2]
0x40010028 (0)[0], 0x40010068 (0)[1], 0x400100A8 (0)[2], 0x40014028 (1)[0], 0x40014068 (1)[1],
0x400140A8 (1)[2]
Write-only
–
–
–
6
LDRAS
29
21
13
–
–
–
5
CPCS
28
20
12
–
–
–
4
CPBS
27
19
11
–
–
–
3
CPAS
26
18
10
–
–
–
2
SAM3S Preliminary
LOVRS
25
17
–
–
9
–
1
COVFS
24
16
–
–
8
–
0
793