ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 1108

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ii
SAM3S Preliminary
10 ARM Cortex
11 Debug and Test Features .................................................................... 215
12 Reset Controller (RSTC) ...................................................................... 223
9.2
9.3
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
10.13
10.14
10.15
10.16
10.17
10.18
10.19
10.20
10.21
10.22
10.23
10.24
11.1
11.2
11.3
11.4
11.5
12.1
APB/AHB bridge ..............................................................................................35
Peripheral Signal Multiplexing on I/O Lines .....................................................35
About this section ............................................................................................39
Embedded Characteristics ..............................................................................39
About the Cortex-M3 processor and core peripherals .....................................39
Programmers model ........................................................................................42
Memory model .................................................................................................54
Exception model ..............................................................................................63
Fault handling ..................................................................................................70
Power management ........................................................................................73
Instruction set summary ..................................................................................75
Intrinsic functions .............................................................................................78
About the instruction descriptions ....................................................................79
Memory access instructions ............................................................................87
General data processing instructions ............................................................103
Multiply and divide instructions ......................................................................119
Saturating instructions ...................................................................................123
Bitfield instructions .........................................................................................125
Branch and control instructions .....................................................................129
Miscellaneous instructions .............................................................................137
About the Cortex-M3 peripherals ...................................................................150
Nested Vectored Interrupt Controller .............................................................151
System control block .....................................................................................164
System timer, SysTick ...................................................................................191
Memory protection unit ..................................................................................196
Glossary ........................................................................................................210
Description .....................................................................................................215
Embedded Characteristics ............................................................................215
Application Examples ....................................................................................216
Debug and Test Pin Description ....................................................................217
Functional Description ...................................................................................218
Description .....................................................................................................223
®
M3 Processor .................................................................. 39
6500C–ATARM–8-Feb-11