ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 203
![IC MCU 32BIT 256KB FLASH 100LQFP](/photos/6/76/67646/313-100-lqfp_sml.jpg)
ATSAM3S4CA-AU
Manufacturer Part Number
ATSAM3S4CA-AU
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4CA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
79
Ram Memory Size
48KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Cpu Family
AT91
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
64MHz
Total Internal Ram Size
48KB
# I/os (max)
79
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.62V
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4CA-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 203 of 1118
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10.23.5
• XN
Instruction access disable bit:
0 = instruction fetches enabled
1 = instruction fetches disabled.
• AP
Access permission field, see
• TEX, C, B
Memory access attributes, see
• S
Shareable bit, see
• SRD
Subregion disable bits. For each bit in this field:
0 = corresponding sub-region is enabled
1 = corresponding sub-region is disabled
See
Region sizes of 128 bytes and less do not support subregions. When writing the attributes for such a region, write the SRD
field as 0x00.
• SIZE
Specifies the size of the MPU protection region. The minimum permitted value is 3 (b00010), see See
on page 204
• ENABLE
6500C–ATARM–8-Feb-11
“Subregions” on page 208
31
23
15
7
MPU Region Attribute and Size Register
Reserved
Reserved
for more information.
Reserved
Table 10-36 on page
30
22
14
6
The RASR defines the region size and memory attributes of the MPU region specified by the
RNR, and enables that region and any subregions. See the register summary in
page 197
RASR is accessible using word or halfword accesses:
The bit assignments are:
• the most significant halfword holds the region attributes
• the least significant halfword holds the region size and the region and subregion enable bits.
Table 10-39 on page
Table 10-37 on page
for more information.
for its attributes.
29
21
13
5
204.
205.
TEX
XN
28
20
12
204.
4
SRD
Reserved
SIZE
27
19
11
3
26
18
10
S
2
SAM3S Preliminary
AP
25
17
C
9
1
“SIZE field values”
Table 10-35 on
ENABLE
24
16
B
8
0
203
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