ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 426

• Manufacturer Part Number: ATSAM3S4CA-AU
• Description: IC MCU 32BIT 256KB FLASH 100LQFP
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4CA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 79
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 16x10/12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: ATSAM3S
• No. Of I/o's: 79
• Ram Memory Size: 48KB
• Cpu Speed: 64MHz
• No. Of Timers: 6
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Cpu Family: AT91
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 64MHz
• Total Internal Ram Size: 48KB
• # I/os (max): 79
• Number Of Timers - General Purpose: 6
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.62V
• On-chip Adc: 16-chx12-bit
• On-chip Dac: 2-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

25.5.3
25.5.4
25.5.5
426
SAM3S Preliminary
3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator
Main Clock Oscillator Selection
Main Clock Frequency Counter
After reset, the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is disabled and it is
not selected as the source of MAINCK.
The user can select the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator to be the
source of MAINCK, as it provides a more accurate frequency. The software enables or disables
the main oscillator so as to reduce power consumption by clearing the MOSCXTEN bit in the
Main Oscillator Register (CKGR_MOR).
When disabling the main oscillator by clearing the MOSCXTEN bit in CKGR_MOR, the
MOSCXTS bit in PMC_SR is automatically cleared, indicating the Main Clock is off.
When enabling the main oscillator, the user must initiate the main oscillator counter with a value
corresponding to the startup time of the oscillator. This startup time depends on the crystal fre-
quency connected to the oscillator.
When the MOSCXTEN bit and the MOSCXTCNT are written in CKGR_MOR to enable the main
oscillator, the XIN and XOUT pins are automatically switched into oscillator mode and
MOSCXTS bit in the Power Management Controller Status Register (PMC_SR) is cleared and
the counter starts counting down on the slow clock divided by 8 from the MOSCXTCNT value.
Since the MOSCXTCNT value is coded with 8 bits, the maximum startup time is about 62 ms.
When the counter reaches 0, the MOSCXTS bit is set, indicating that the main clock is valid.
Setting the MOSCXTS bit in PMC_IMR can trigger an interrupt to the processor.
The user can select either the 4/8/12 MHz Fast RC oscillator or the 3 to 20 MHz Crystal or
Ceramic Resonator-based oscillator to be the source of Main Clock.
The advantage of the 4/8/12 MHz Fast RC oscillator is that it provides fast startup time, this is
why it is selected by default (to start up the system) and when entering Wait Mode.
The advantage of the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is that it is very
accurate.
The selection is made by writing the MOSCSEL bit in the Main Oscillator Register
(CKGR_MOR). The switch of the Main Clock source is glitch free, so there is no need to run out
of SLCK, PLLACK or PLLBCK in order to change the selection. The MOSCSELS bit of the
Power Management Controller Status Register (PMC_SR) allows knowing when the switch
sequence is done.
Setting the MOSCSELS bit in PMC_IMR can trigger an interrupt to the processor.
The device features a Main Clock frequency counter that provides the frequency of the Main
Clock.
The Main Clock frequency counter is reset and starts incrementing at the Main Clock speed after
the next rising edge of the Slow Clock in the following cases:
• when the 4/8/12 MHz Fast RC oscillator clock is selected as the source of Main Clock and
• when the 3 to 20 MHz Crystal or Ceramic Resonator-based oscillator is selected as the
when this oscillator becomes stable (i.e., when the MOSCRCS bit is set)
source of Main Clock and when this oscillator becomes stable (i.e., when the MOSCXTS bit
is set)
6500C–ATARM–8-Feb-11