ATSAM3S4CA-AU Atmel, ATSAM3S4CA-AU Datasheet - Page 850

IC MCU 32BIT 256KB FLASH 100LQFP

ATSAM3S4CA-AU

Manufacturer Part Number
ATSAM3S4CA-AU
Description
IC MCU 32BIT 256KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Sr
Datasheets

Specifications of ATSAM3S4CA-AU

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
79
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 16x10/12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
ATSAM3S
No. Of I/o's
79
Ram Memory Size
48KB
Cpu Speed
64MHz
No. Of Timers
6
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Cpu Family
AT91
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
64MHz
Total Internal Ram Size
48KB
# I/os (max)
79
Number Of Timers - General Purpose
6
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.62V
On-chip Adc
16-chx12-bit
On-chip Dac
2-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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36.6.2
36.6.2.1
Figure 36-3. Functional View of the Channel Block Diagram
850
Peripheral Bus
Generator
from APB
Clock
from
z = 0 (x = 0, y = 1),
z = 1 (x = 2, y = 3),
z = 2 (x = 4, y = 5),
z = 3 (x = 6, y = 7)
SAM3S Preliminary
PWM Channel
Block Diagram
Selector
Clock
2-bit gray
counter z
Each of the 4 channels is composed of six blocks:
• A clock selector which selects one of the clocks provided by the clock generator (described in
• A counter clocked by the output of the clock selector. This counter is incremented or
• A comparator used to compute the OCx output waveform according to the counter value and
• A 2-bit configurable gray counter enables the stepper motor driver. One gray counter drives 2
• A dead-time generator providing two complementary outputs (DTOHx/DTOLx) which allows
• An output override block that can force the two complementary outputs to a programmed
• An asynchronous fault protection mechanism that has the highest priority to override the two
Section 36.6.1 on page
decremented according to the channel configuration and comparators matches. The size of
the counter is 16 bits.
the configuration. The counter value can be the one of the channel counter or the one of the
channel 0 counter according to SYNCx bit in the
page 888
channels.
to drive external power control switches safely.
value (OOOHx/OOOLx).
complementary outputs in case of fault detection (PWMHx/PWMLx).
Duty-Cycle
Channel x
Channel 0
Counter
Update
Counter
Period
(PWM_SCM).
MUX
Comparator
Comparator
SYNCx
848).
x
y
OCx
OCy
Dead-Time
Dead-Time
Generator
Generator
“PWM Sync Channels Mode Register” on
Channel y (= x+1)
DTOHx
DTOLx
DTOHy
DTOLy
Channel x
Override
Override
Output
Output
OOOHx
OOOLx
OOOHy
OOOLy
Protection
Protection
6500C–ATARM–8-Feb-11
Fault
Fault
PWMHx
PWMLx
PWMHy
PWMLy

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