R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 1037

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
[Legend]
x:
Note:
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Bit
3
2
1
Bit Name
CKS1
CKS0
ADSTCLR 0
Don't care
*
Setting prohibited in the H8S/2424 group.
Initial
Value
0
0
R/W
R/W
R/W
R/W
Description
Clock Select 1 and 0
These bits select the A/D conversion clock (ADCLK) and
specify the A/D conversion time in combination with the
EXCKS bit.
First select the A/D conversion time while ADST = 0 in
ADCSR and then set the mode of A/D conversion. Before
entering software standby mode or module stop state, set
these bits to B'11.
Set CKS1 and CKS0 bits appropriately so that the ADCLK
satisfies the conversion time.
EXCKS, CKS1, and CKS0
000: Setting prohibited
001: A/D conversion time = 268 states (max.) at ADCLK = φ/4
010: A/D conversion time = 138 states (max.) at ADCLK = φ/2
011: A/D conversion time = 73 states (max.) at ADCLK = φ
100: Setting prohibited
101: A/D conversion time = 172 states (max.) at ADCLK = φ/4
110: A/D conversion time = 90 states (max.) at ADCLK = φ/2
111: A/D conversion time = 49 states (max.) at ADCLK = φ
A/D Start Clear
This bit enables or disables automatic clearing of the ADST
bit in scan mode.
0: The ADST bit is not automatically cleared to 0 in scan
1: The ADST bit is cleared to 0 upon completion of the A/D
mode.
conversion for all of the selected channels in scan mode.
Section 17 A/D Converter
Page 1007 of 1372