R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 554

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 I/O Ports
10.1.5
Port 1 pins also function as the pins for PPG outputs, TPU I/Os, EXDMAC I/Os (H8S/2426
Group, H8S/2426R Group), SSU I/Os, and DMAC I/Os (H8S/2424 Group). The correspondence
between the register specification and the pin functions is shown below.
(1)
• P17/PO15/TIOCB2/TCLKD/EDRAK3/SCS0-A
• Modes 1, 2, 4, and 7 (EXPE = 1)
Page 524 of 1372
SSU settings
EDRAKE
TPU channel 2
settings
P17DDR
NDER15
Pin function
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, TPU channel 2 settings (by bits MD3 to MD0 in TMDR_2, bits IOB3 to
IOB0 in TIOR_2, and bits CCLR1 and CCLR0 in TCR_2), bits TPSC2 to TPSC0 in TCR_0
and TCR_5, bit NDER15 in NDERH of the PPG, bit EDRAKE in EDMDR_3 of the
EXDMAC, bits MSS, CSS1, and CSS0 in SSCRH and bit SSUMS in SSCRL of the SSU, bits
SCS0S1 and SCS0S0 in PFCR5, and bit P17DDR.
Pin Functions of H8S/2426 Group and H8S/2426R Group
Pin Functions
(1) in table
TIOCB2
output
below
⎯
⎯
input
P17
⎯
0
(1) in table below
(2) in table below
TCLKD input*
0
output
P17
TIOCB2 input*
1
0
2
output
PO15
1
1
1
EDRAK3
output
⎯
⎯
⎯
1
H8S/2426, H8S/2426R, H8S/2424 Group
SCS0-A
input*
below
(2) in
table
0
REJ09B0466-0350 Rev. 3.50
3
SCS0-A
below
(4) in
table
I/O*
⎯
⎯
⎯
0
5
Jul 09, 2010
SCS0-A
output*
below
(3) in
table
⎯
4