R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 1086
R4F24268NVFQV
Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 19 Synchronous Serial Communication Unit (SSU)
19.4.5
In SSU mode, data communications are performed via four lines: clock line (SSCK), data input
line (SSI or SSO), data output line (SSI or SSO), and chip select line (SCS).
In addition, the SSU supports bidirectional mode in which a single pin functions as data input and
data output lines.
(1)
Figure 19.4 shows an example of the initial settings in SSU mode. Before data transfer, clear both
the TE and RE bits in SSER to 0 to set the initial values.
Note: Before changing operating modes and communications formats, clear both the TE and RE
Page 1056 of 1372
[1]
[2]
[3]
[4]
[5]
Initial Settings in SSU Mode
Specify MSS, BIDE, SOL, SCKS, CSS1,
bits to 0. Although clearing the TE bit to 0 sets the TDRE bit to 1, clearing the RE bit to 0
does not change the values of the RDRF and ORER bits and SSRDR. Those bits retain the
previous values.
and CEIE bits in SSER simultaneously
Specify MLS, CPOS, CPHS, CKS2,
Specify SDOS, SSCKOS, SCSOS,
TENDSTS, SCSATS and SSODTS
Clear TE and RE bits in SSER to 0
Clear SSUMS in SSCRL to 0 and
SSU Mode
Specify TE, RE, TEIE, TIE, RIE,
specify bits DATS1 and DATS0
CKS1, and CKS0 bits in SSMR
and CSS0 bits in SSCRH
Start setting initial values
Clear a bit in DDR to 0
bits in SSCR2
Figure 19.4 Example of Initial Settings in SSU Mode
End
[1] When the pin is used as an input.
[2] Specify master/slave mode selection, bidirectional mode enable,
[3] Selects SSU mode and specify transmit/receive data length.
[4] Specify MSB first/LSB first selection, clock polarity selection,
[5] Enables/disables interrupt request to the CPU.
SSO pin output value selection, SSCK pin selection, and SCS pin
selection.
clock phase selection, and transfer clock rate selection.
H8S/2426, H8S/2426R, H8S/2424 Group
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
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