R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 893

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
14.6.2
If a timer counter clock pulse is generated during the next cycle after the T
cycle, the write takes priority and the timer counter is not incremented. Figure 14.5 shows this
operation.
14.6.3
If bits CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0) before
changing the value of bits CKS2 to CKS0.
14.6.4
If the mode is switched from watchdog timer to interval timer, while the WDT is operating, errors
could occur in the incrementation. Software must stop the watchdog timer (by clearing the TME
bit to 0) before switching the mode.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
φ
Address
Internal write signal
TCNT input clock
TCNT
Contention between Timer Counter (TCNT) Write and Increment
Changing Value of CKS2 to CKS0
Switching between Watchdog Timer Mode and Interval Timer Mode
Figure 14.5 Contention between TCNT Write and Increment
TCNT write cycle
T 1
T 2
Next cycle
N
Counter write data
Section 14 Watchdog Timer (WDT)
M
2
state of a TCNT write
Page 863 of 1372

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