R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 97

• Manufacturer Part Number: R4F24268NVFQV
• Description: MCU 256K FLASH 48K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2400r

Specifications of R4F24268NVFQV

• Core Processor: H8S/2600
• Core Size: 16/32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

H8S/2426, H8S/2426R, H8S/2424 Group
Table 2.5
Note:
Table 2.6
Note:
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Instruction
AND
OR
XOR
NOT
Instruction
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
*
*
Size refers to the operand size.
B: Byte
W: Word
L: Longword
Size refers to the operand size.
B: Byte
W: Word
L: Longword
Logic Operations Instructions
Shift Instructions
Size*
B/W/L
B/W/L
B/W/L
B/W/L
Size*
B/W/L
B/W/L
B/W/L
B/W/L
Function
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and another
general register or immediate data.
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data.
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register and
another general register or immediate data.
∼ (Rd) → (Rd)
Takes the one's complement (logical complement) of general register
contents.
Function
Rd (shift) → Rd
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (shift) → Rd
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (rotate) → Rd
Rotates general register contents.
1-bit or 2-bit rotation is possible.
Rd (rotate) → Rd
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
Page 67 of 1372
Section 2 CPU