R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 641

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
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H8S/2426, H8S/2426R, H8S/2424 Group
10.9.4
PAPCR controls on/off of the input pull-up MOS for port A. Bits 7 to 5 are valid in modes 1 and 2
and all the bits are valid in modes 4 and 7.
10.9.5
PAODR specifies the output type of each port A pin.
Note:
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
PA7PCR
PA6PCR
PA5PCR
PA4PCR
PA3PCR
PA2PCR
PA1PCR
PA0PCR
Bit Name
PA7ODR
PA6ODR
PA5ODR
PA4ODR
PA3ODR
PA2ODR
PA1ODR
PA0ODR
*
Port A Pull-Up MOS Control Register (PAPCR)
Port A Open Drain Control Register (PAODR)
Not supported in the H8S/2426 Group and the H8S/2426R Group
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
When in an input port state, setting the
corresponding bit to 1 turns on the input pull-up
MOS for that pin.
These bits should not be set to 1 when the SCI is
used.
Description
When not specified for address output or CS7
output*, setting a PAODR bit to 1 makes the
corresponding pin an NMOS open-drain output pin,
while clearing a PAODR bit to 0 makes the
corresponding pin a CMOS output pin.
Section 10 I/O Ports
Page 611 of 1372

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