R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 131

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
4.4
Traces are enabled in interrupt control mode 2. Trace mode is not activated in interrupt control
mode 0, irrespective of the state of the T bit. For details on interrupt control modes, see section 5,
Interrupt Controller.
If the T bit in EXR is set to 1, trace mode is activated. In trace mode, a trace exception occurs on
completion of each instruction. Trace mode is not affected by interrupt masking. Table 4.3 shows
the state of CCR and EXR after execution of trace exception handling. Trace mode is canceled by
clearing the T bit in EXR to 0. The T bit saved on the stack retains its value of 1, and when control
is returned from the trace exception handling routine by the RTE instruction, trace mode resumes.
Trace exception handling is not carried out after execution of the RTE instruction.
Interrupts are accepted even within the trace exception handling routine.
Table 4.3
[Legend]
1:
0:
⎯:
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Interrupt Control Mode
0
2
Set to 1
Cleared to 0
Retains value prior to execution
Trace Exception Handling
Status of CCR and EXR after Trace Exception Handling
I
1
Trace exception handling cannot be used.
CCR
UI
I2 to I0
Section 4 Exception Handling
EXR
T
0
Page 101 of 1372

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